The present invention relates to semiconductor integrated circuit (IC) fabrication and, more particularly, to fingered capacitors.
Fingered capacitors or fringe capacitors are commonly used in Analog-Mixed Signal (AMS) ICs. FIG. 1 is based on FIG. 1 of U.S. Pat. No. 6,385,033, which is a perspective view of a conventional fingered capacitor 100 having a first capacitor element 120. The first capacitor element 120 includes a positive metal plate 130 and a negative metal plate 140. The positive metal plate 130 has a comb-like structure that includes an elongated end portion 132 having fingers 134 extending perpendicular from the end portion 132. The negative metal plate 140 also has a comb-like structure that includes an elongated end portion 142 having fingers 144 extending perpendicular from the end portion 142. The fingers 134 and 144, which are preferably evenly spaced and have consistent widths and lengths, are interdigitated (i.e., interleaved) within the same layer of the integrated circuit (IC) die (not shown). A dielectric fills the space between the respective fingers 134 and 144. Deep sub-micron IC manufacturing processes or techniques allow the spacing between the fingers to be close enough such that fringe capacitance between the edges of adjacent fingers within each layer is quite significant. Capacitance has been found to increase as the spacing between the fingers decreases. The newest techniques of forming devices in integrated circuits allow smaller spacing between fingers to generate relatively large amounts of fringe capacitance.
FIG. 2 is a cross-sectional side view of a portion of a conventional fingered capacitor 200, such as the fingered capacitor 100 of FIG. 1, along the perpendicular cut-line AA′ of FIG. 1. In particular, FIG. 2 shows three adjacent metal fingers 210 of the fingered capacitor 200, which would typically have one or more additional, equivalent fingers to the left and/or right of the three fingers 200. The three metal fingers 210 in FIG. 2 could correspond to, in FIG. 1, one of the positive-plate fingers 134 located between two negative-plate fingers 144 or one of the negative-plate fingers 144 located between two positive-plate fingers 134. The fingered capacitor 200 can be implemented in one metal layer of a multi-layer integrated circuit having one or more metal layers below the metal layer of the fingered capacitor 200 and/or one or more metal layers above that metal layer, but it is typically replicated across several metal layers in order to get higher fringe capacitance at the same layout area.
As shown in FIG. 2, the fingered capacitor 200 comprises a bottom dielectric cap layer 202 that provides copper passivation and also functions as an etch stop layer. Above the dielectric cap layer 202 is a low-K dielectric layer 204. Located within “inverted-trapezoid-shaped” trenches formed in the low-K dielectric layer 204 are copper traces that form the metal fingers 210. Covering the low-K dielectric layer 204 and the metal fingers 210 is a top dielectric cap layer 212, upon which one or more other metal layers (not shown) may be fabricated.
FIGS. 3A-3D are cross-sectional side views illustrating a conventional process for fabricating the fingered capacitor 200 of FIG. 2. FIG. 3A shows a multi-layer structure 320 having the low-K dielectric layer 204 formed over the dielectric cap layer 202. FIG. 3B shows the structure 330 after trenches 309 have been formed in the low-K dielectric layer 204 of FIG. 3A using conventional photolithography techniques. FIG. 3C shows the structure 340 after (i) the trenches 309 of FIG. 3B have been filled with copper plating and then (ii) chemical-mechanical polishing (CMP) is performed to provide the structure 340 with a flat upper surface. FIG. 3D shows the fingered capacitor 200 formed by applying the top dielectric cap layer 212 over the structure 340 of FIG. 3C.
As should be apparent from above, precision and uniformity across the wafer are the two key requirements of fingered capacitors. However, due to the nature of the Chemical-Mechanical-Polish (CMP) process, the metal thickness is not so easy to control. It would be advantageous to be able to better control the metal thickness.